Correlator-beamformer plugin
The CBF plugin provides GPU-accelerated correlation and beamforming for antenna arrays. It ingests channelized complex-voltage data, applies delay and complex gain models, forms voltage or detected beams, computes visibilities, and sends products to dedicated writers.
This page was verified against the supplied Galaxy collection version 1.0.0,
whose collection name is EDD.edd_cbf. The repository also contains several
calibration and controller components that are under active development; test
the exact pinned revision as a coordinated system.
Processing graph
channelizer / F-engine
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v
cbf_pipeline <---- delay_manager
| | | <--- gain / weight calibration
| | |
| | +---- visibility_writer
| +-------- power_beam_writer
+------------ downstream voltage-beam consumer
Main roles
Role |
Default product |
Function |
|---|---|---|
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Streaming GPU correlator and beamformer. |
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Measuring pipeline that writes detected beam filterbanks. |
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Measuring visibility formatter and writer. |
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Records selected channelized antenna voltages. |
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Controls FPGA channelizers through a KATCP proxy. |
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Publishes geometric and instrumental delay models. |
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Produces or manages complex-gain solutions. |
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Generates beam weights for phased-array operation. |
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Writes autocorrelation matrices for calibration. |
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none |
Build and installation roles, not observing products. |
Input and output formats
The supplied default input is MPIFR_EDD_ARGOS_Packetizer:1: channelized
complex voltage with timestamp, antenna, channel, and polarization encoded in
the SPEAD index vector. A complete descriptor includes total and per-stream
channel count, group ID, sample rate, bit depth, samples per heap, central
frequency, polarizations, sync time, and index-vector bit allocation.
The main pipeline can publish:
VoltageBeamDataStreamFormat:1Complex tied-array voltage beams for coherent downstream processing.
PowerBeamDataStreamFormat:1Detected beam spectra consumed by the power-beam writer.
FullStokesBeamDataStreamFormat:1Full-Stokes detected beam products.
VisibilityDataStreamFormat:1Cross- and autocorrelation products consumed by the visibility writer.
Only enable products with provisioned consumers or intentional external subscribers. Every enabled product contributes network, memory, and GPU load.
Main pipeline configuration
Key |
Default |
Meaning |
|---|---|---|
|
4 |
Number of processed beams. |
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2 |
Voltage beams retained before detection. |
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32 |
Fine-channelization transform length. |
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1 / 1 |
Rational sampling or processing-rate factors. The key is spelled
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128 |
Beam-spectrum accumulation. |
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Visibility accumulation. The current key retains this spelling. |
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0 through 15 |
Antenna IDs selected from the input index vector. |
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Selected polarization IDs. |
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nested mapping |
Enable and route voltage, power, full-Stokes, and visibility products. |
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Receive backend: |
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Transmit backend: |
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8 |
CPU threads used for input capture. |
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8 |
DADA ring-buffer slots. |
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Redis pub/sub channel containing delay models. |
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10 s |
Maximum wait for usable delay information. |
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Set to |
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false |
Development-only escape hatch for unsuitable resource topology. |
DPDK settings under dpdk_config.dpdk_eal_args are merged over the core
defaults. They must agree with device binding and huge-page configuration in
the host inventory.
Writer configuration
The power-beam writer selects beam IDs with beams, controls file size with
nspectra_per_file, obtains per-beam pointing metadata from
beam_metadata_channel, and uses base_output_directory below its pipeline
data scope. Its input must include beam, subband, sample-rate, frequency,
bandwidth, time-resolution, and bit-depth dimensions.
The visibility writer controls frequency-window grouping with
channels_per_window and parallelism with formatter_nthreads and
writer_nthreads. Validate the output format and metadata with downstream
calibration or imaging software before commissioning.
Resource planning
CBF performance depends on antenna count, polarization count, channels, beams, correlation integration, enabled products, network backend, and GPU type. Before deploying:
Calculate input and every enabled output rate.
Benchmark the exact GPU architecture and CUDA suite.
Place NIC, GPU, CPU cores, and memory on a compatible NUMA node.
Reserve unique POSIX message queues and shared-memory keys.
Confirm delay and gain updates arrive within their timeout.
Confirm writer storage sustains the aggregate rate with adequate margin.
Monitoring and diagnosis
The main and writer roles install pipeline, receiver, and DADA panels. Monitor packet loss, ring-buffer fill, processing latency, delay age, scaling or statistics, writer queues, file progress, and output rate. A healthy receiver does not prove scientifically valid output: verify antenna ordering, polarization convention, delay sign, phase, scaling, and sky coordinates with a known source.
Testing
The repository contains extensive CUDA unit tests for beamforming, correlation, weights, scaling, statistics, transposition, and writers, plus Python tests for models, adapters, stream handlers, resources, and pipeline state transitions. Commissioning must add an end-to-end array test with known delays and complex gains and independently validate both beam and visibility products.